The invention relates to a programmable phase shifter having a first input intended to receive an input signal to be phase-shifted, a second input intended to receive a control signal, and an output intended to supply an output signal which, with respect to the input signal, has a phase shift of which a value X is defined by the control signal, said programmable phase shifter comprising:
a quadratic module having an input which is connected to the first input of the programmable phase shifter, and an output intended to supply a signal which is in phase quadrature with the input signal, PA1 a first and a second multiplier each having a first and a second input and an output, the first input of the first multiplier being connected to the first input of the programmable phase shifter, the first input of the second multiplier being connected to the output of the quadratic module, the output of the first multiplier being intended to supply a signal resulting from the multiplication of the signal received at its first input by a value which is substantially equal to V.cos (X), in which V represents a DC voltage, the output of the second multiplier being intended to supply a signal resulting from the multiplication of the signal received at its first input by a value which is substantially equal to V.sin (X), the values V.cos (X) and V.sin (X) being defined by signals elaborated on the basis of the control signal and received by the multipliers at their second input, PA1 an adder having a first input which is connected to the output of the first multiplier, a second input which is connected to the output of the second multiplier and intended to supply, at an output connected to the output of the programmable phase shifter, a signal resulting from the sum of the signals received at its first and second inputs. PA1 a switching stage composed of N-1 switches each having a first and a second terminal and a control input for controlling the switching operation, the first terminal of each switch being connected to the first input of the multiplier, the N-1 control inputs receiving N-1 bits from the second input of the multiplier, PA1 an adder having an output and N-1 inputs, each being connected to the second terminal of one of the N-1 switches of the switching stage, and PA1 an inversion module having a first input connected to the output of the adder, a control input receiving that bit, referred to as sign bit, from the second input of the multiplier which does not control any switch of the switching stage, and an output constituting the output of the multiplier, said inversion module being intended to operate the inversion of the sign of a signal received at its first input if the sign bit is in an active state, and to function as a follower if the sign bit is in an inactive state. PA1 a resistance ladder arranged in series between two power supply terminals, which resistances are intended to supply a plurality of reference voltages at their junction points, PA1 a comparison stage composed of comparators, each having two inputs and one output, and being intended to receive the analog input voltage at one input and one of the reference voltages at the other input, PA1 a memory stage composed of flipflops, each being connected to the output of one of the comparators for storing the result of a comparison, and intended to receive a sampling signal at a clock input, PA1 a binary encoder connected to the memory stage for receiving the stored data and for furnishing the digital output signal of the converter,
Such a programmable phase shifter is known from British patent specification 1 527 603. The phase shifter which is described in this document comprises a potentiometer generating, on the basis of an analog control signal, a first analog voltage having a value which is substantially equal to V.sin (X), and a second analog voltage having a value which is substantially equal to V.cos (X). The input signal which has, for example, the form A.cos .omega.t, is multiplied within the first multiplier by the signal which this multiplier receives at its second input, i.e. V.cos (X), while a signal which is in phase quadrature with the input signal and is thus expressed by the form A.sin .omega.t, is multiplied within the second multiplier by the signal which this multiplier receives at its second input, i.e. V.sin (X). The output signal of the adder thus has the form A'.(cos .omega.t.cos (X)+sin .omega.t.sin (X)), which corresponds to A'.cos (.omega.t-X). The value of X, implicitly defined by the control signal, thus determines the phase shift of the output signal with respect to the input signal. Because of the analog nature of the potentiometer, the values of the voltages which it generates on the basis of the control signal may lack precision. The error produced on these voltages, which itself is difficult to control, happens to be multiplied within the multipliers which generate a supplementary error because of their analog nature. These accumulated errors may introduce a significant difference between the desired phase shift and the phase shift actually obtained by means of the programmable phase shifter.